1. Field of Invention
The application relates to a receiver and, in particular, to a receiver for a parallel bus.
2. Related Art
With development of the integrated circuit, the processing speed for data bits of the processor may also be promoted. Thus, in order to maintain the whole system at the best performance, transmission bit rate between other element and the integrated circuit is required to promote and match up to the processor for achieving the best performance.
Please refer to FIG. 1, a PCB (printed circuit board) 1 including a parallel bus 11 and two integrated circuits 12, 13 is shown. The parallel bus 11 is electrically connected between the integrated circuit 12 and the integrated circuit 13. The integrated circuit 12 receives a plurality of data signals 131 and a clock signal 132 delivered from the integrated circuit 13 through the parallel bus 11. In this case, the parallel bus 11 may be a memory bus, and the integrated circuit 13 may be a DDR-SDRAM or a SDRAM. The integrated circuit 12 may be a system chipset, which connects with other device such as CPU, graphic card, or I/O bus.
The data signals 131 and the clock signal 132 are designated to be synchronous or to arrive to the integrated circuit 12 at the same time, however, a signal skew may be caused when the data signals 131 are transmitted through the parallel bus 11 via mismatch transmission path, and therefore it results in low system performance. The signal skew may be caused by the following issues: a length discrepancy between signal lines of the parallel bus 11, a length discrepancy between signal lines of the integrated circuit 12 or 13, a different package bond (or bump) location of the integrated circuit 12 or 13, a path length mismatch package substrate layout mismatch, etc.
In the conventional technology, signal lines on PCB 1 have the uniform layouts, so that integrated circuit 12 and 13 resulting in less mismatch between data signals. However, it is required that the PCB 1, the integrated circuit 12 and 13 have well layout to avoid a discrepancy between transmission paths of the signal lines.
It is therefore to reduce the skew amount between the data signals in the receiver, so as to adapt the receiver to the transmission path discrepancy of signals lines resulting from the layout of the mother board or the package board becomes important.